Cmos Current/voltage Mode Winner-take-all Circuit with Spatial Filtering for Image Processing Implementation

A CMOS Current/Voltage mode winner-take-all circuit (WTA) with spatial filtering for image processing applications is presented. This WTA circuit has a unique ability of spatial filtering that allows removal of the background from the image and is suitable for integration with CMOS Active Pixel Sensors. In this circuit, image intensity has been chosen for the input saliency map. The removal process is performed by zeroing the values of the image background intensity levels and transferring the new saliency map to a standard WTA circuit, so only the potential objects of interest are compared by the WTA. Two circuits, current mode and voltage mode WTA circuits with filtering, have been implemented in 0.5 um submicron CMOS technology. Their operation is discussed and simulation results are reported.